As technology has progressed, the demands made of data processing systems have steadily increased to require faster and more efficient performance. In order to achieve the desired performance requirements, multiple processors are often used to perform functions in parallel to increase the overall processing capability of a data processing system. Such multi-processor systems typically implement multiple silicon chips that are interconnected to perform a desired function.
With multiple processors being collectively used to provide a single function, it is important to compensate for failures within one of the processors in a manner that is easily implemented and reduces an amount of overhead or cost associated with implementing the multi-processor system. Current implementations of multi-processor systems typically comprise multiple processors, wherein at least a portion of the multiple processors are provided as redundant processors to ensure that the multi-processing module functions correctly at all times. For example, U.S. Pat. No. 4,891,810 by Patrick de Corlieu, et al. discloses a computer comprising redundant elements, wherein one of the redundant elements takes the place of a malfunctioning element to ensure that a critical stage processing does not result in erroneous results. Similarly, U.S. Pat. No. 4,823,256 by Bishop, et al. discloses a dual processor system which has two modes of operation: a converged mode and a diverged mode. In the diverged mode of operation, both processors are active and execute different tasks. When in this mode, the dual processor system enables one of the two processors to have to be a primary processor. In the converged mode of operation, the dual processor system of U.S. Pat. No. 4,823,256 enables one processor to be active, while the other processor is standing by to take up execution of the tasks from a point where the first processor terminated execution. In yet another example, U.S. Pat. No. 3,681,578 by Stevens which discloses a data processing system having three data processors for processing the same information. When an output of the data processor substantially disagrees with an output of a majority of the other processors an alarm is raised or the particular processor may be isolated. Additional examples of processor systems that utilize duplicate processors or circuitry to correct errors may be found in U.S. Pat. No. 4,802,119 by Heene, et al. and in U.S. Pat. No. 5,136,498 by McLaughlin, et al.
While each of the aforementioned multi-processor systems provides a unique method for ensuring that a multi-processor system functions correctly, the use of multiple processors to perform this function results in excessive overhead requirements. Additionally, each of the aforementioned patents fails to address the situation in which a redundant data processor is faulty or is not required for performing a specific data processing application. In each of these cases, the data processing systems disclosed in the cited patents require the overhead associated with each of the redundant data processing systems to be utilized.